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JK

Johan Klockars

Cobham Gaisler AB
Hardware Engineer
Johan Klockars has an MSc in Computer Science & Engineering and is a Hardware Engineer at Cobham Gaisler, working on their new RISC-V CPU core. He has been doing embedded systems development for 20 years: image processing and communications protocols in FPGAs, real-time systems, WiFi networking, device drivers, etc.

Co-speaker at the 2020 RISC-V Summit (NOEL-V: A new high performance RISC V processor family) and at the 2020 RISC-V Global Forum (same title on talk). Also held a ~40 minute presentation on the "Scientific day" during the RISC-V week in Paris, October 2019 (https://open-src-soc.org/program.html#T3-KLOCKARS), regarding the NOEL-V and our development methodology.
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