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Thursday, September 3 • 10:00am - 10:15am
Noel-V: A New High-Performance RISC-V Processor Family - Johan Klockars & Alen Bardizbanyan, Cobham Gaisler AB

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Cobham Gaisler AB has a long heritage in the space industry, with SPARC based LEON processors and GRLIB IP components. They provide both IP and space qualified chips.
The NOEL-V processor family, based on the RISC-V ISA, is a new addition to the Gaisler line. The first variant released, HPP64, is a 64-bit high-performance in-order dual-issue processor, capable of running Linux (other configurations under development). This variant has a 7-stage pipeline, can achieve 4.69 Coremark/MHz by initial estimates and supports RV64GCBNH (some extensions are under development).
The NOEL-V processors are open sourced under the GPL license. Fault tolerance and additional components for high performance, like L2-cache and a pipelined FPU, can be licensed commercially. The NOEL-V processors are embedded in Gaisler's GRLIB IP library, making it possible to build systems around them using GRLIB.


Johan Klockars

Hardware Engineer, Cobham Gaisler AB
Johan Klockars has an MSc in Computer Science & Engineering and is a Hardware Engineer at Cobham Gaisler, working on their new RISC-V CPU core. He has been doing embedded systems development for 20 years: image processing and communications protocols in FPGAs, real-time systems, WiFi... Read More →

Alen Bardizbanyan

Hardware Engineer, Cobham Gaisler AB
Alen Bardizbanyan holds a PhD degree on VLSI and computer architecture. He has mainly worked with energy efficiency in processor architectures and involved in teaching activities for VLSI design during his PhD studies. During the last 4 years he has been working at Cobham Gaisler... Read More →

Thursday September 3, 2020 10:00am - 10:15am PDT